Put new module on and reworked. I think some pins might not be making great contact (it turns on immediately without any sequencing delay, and PGOOD isn't going high - consistent with EN and PGOOD floating to their default states).
But I can proceed with bringup since the rail is on and stable.
Comments
Displaying 0 of 1 comments
Andrew Zonenberg
In response to this post1V8 (VCCAUX and VCCO_0 among other things) came up OK.
FPGA responds over JTAG! It's not a brick and it survived reflow.
Now to try bringing up the remaining rails so we can test it more thoroughly.
GTY_VCC came up fine. GTY_VCCAUX not so, it's floating to a leakage voltage but the regulator isn't coming up.
This is a little LDO with an N-channel MOSFET as an inverting level shifter driving the enable. Solder paste print on the FET wasn't great, so reworking that will be the first step in troubleshooting.
by Andrew Zonenberg ;
Likes: 0
Replies: 1
Boosts: 0